1. Technical Field
Various embodiments generally relate to a semiconductor integrated circuit, and more particularly, to a semiconductor memory apparatus.
2. Related Art
A semiconductor memory apparatus may be configured to store data using the charge accumulation of a capacitor. The value associated with data stored in a memory cell is identified according to an amount of charge accumulation within the capacitor of the memory cell.
The amount of charge accumulation may decrease as time goes by. This decrease is due to a leakage current. Thus, to help compensate for the leakage the charges are re-accumulated in the capacitor at predetermined times. This process of re-accumulating the charges in the capacitor can be referred to as a refresh operation.
As the integration of the semiconductor memory apparatus increases the distances between the signal lines and between the memory cells of the semiconductor memory apparatus become narrower. As a result, data stored in the memory cells coupled with frequently activated word lines may be damaged due to the refresh operation. Additionally, data stored in the memory cells that are adjacent to word lines that are adjacent to the frequently activated word lines may also be damaged due to the refresh operation as well.